SUMMARY
Embedded Systems Engineer with strong expertise in FPGA and C/C++ development.
Specialized in low-level optimization, hardware acceleration, and system architecture.
Operational experience in research and industrial environments.
LANGUAGES
FRENCH:
NATIVE SPEAKER
ENGLISH:
FLUENT [TOEIC: 980]
EDUCATION
2020 - 2025 | LE KREMLIN BICETRE, FRANCE
MAJOR: GISTRE - Real Time And Embedded Systems Engineering
PROFESSIONAL EXPERIENCE
MARCH 2025 - AUGUST 2025 | AIX-EN-PROVENCE, FRANCE
- Super Sampling Rate Fast Fourier Transform design in HDL.
- Implementation and benchmark of radix-2/4/8/16 and split-radix in HDL.
- Port of Neural Network from Pytorch to hardware component with Brevitas
and FINN.
- Worked with ADS9 and ADRV9029, evaluation boards.
VHDL | Verilog
Xilinx Vivado
FPGA
Brevitas
FINN
Signal Processing
JULY 2024 - MARCH 2025 | LE KREMLIN-BICÊTRE, FRANCE
- Assisted over 600 students during their first semester of the engineering program.
- Training delivery and workshop preparation.
- Stress testing of Python projects designed to harmonize coding skills of new students.
C
Unix
Python
Shell
SEPTEMBER 2023 - JANUARY 2024 | BRUSSELS, BELGIUM
- Backend development of existing applications.
- Design of new database architecture.
Backend
PostgreSQL
Javascript
Typescript
JANUARY 2023 - JULY 2023 | LE KREMLIN-BICÊTRE, FRANCE
- Researched static-dynamic genericity for hierarchical image
representation.
- Implementation of alphatree in static-dynamic genericity in Pylene
(C++).
C++
Image Processing
Genericity